Not at all. We've successfully interfaced a standard DF9IC modem
over an enhanced parallel port (EPP; EPP has no DMA, only ECP has)
at 76k8. HDLC was implemented in software. The measured overhead on
a 486 machine was very low.
We've used relatively large serial/parallel (and vice versa)
FIFO's from IDT. The interface generates an interrupt say every
10ms, the interrupt handler transfers the whole FIFO contents
in one go, HDLC decoding it between the EPP cycles.
73s
Tom